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Supply Voltage (supply + voltage)
Kinds of Supply Voltage Selected AbstractsLow-voltage electroosmosis pump for stand-alone microfluidics devicesELECTROPHORESIS, Issue 1-2 2003Yuzuru Takamura Abstract Two types of low-voltage electroosmosis pumps were developed using microfabrication technology for usage in handy or stand-alone applications of the micrototal analysis systems (,-TAS) and the lab-on-a-chip. This was done by making a thin (<,1 ,m) region in the flow path and by only applying voltages near this thin region using electrodes inserted into the flow path. The inserted electrodes must be free from bubble formation and be gas-tight in order to avoid pressure leakage. For these electrodes, Ag/AgCl or a gel salt bridge was used. For patterning the gel on the chip, a hydrophilic photopolymerization gel and a photolithographic technique were optimized for producing a gel with higher electric conductivity and higher mechanical strength. For high flow rate application, wide (33.2 mm) and thin (400 nm) pumping channels were compacted into a 1 mm×6 mm area by folding. This pump achieves an 800 Pa static pressure and a flow of 415 nL/min at 10 V. For high-pressure application, a pump was designed with the thin and thick regions in series and positive and negative electrodes were inserted between them alternatively. This pump could increase the pumping pressure without increasing the supply voltage. A pump with 10-stage connections generated a pressure of 25 kPa at 10 V. [source] Envelope tracking power amplifier with static predistortion linearizationINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 2 2009Timo Rautio Abstract This paper presents the design method, properties and driving techniques of a linear 0.5,W 1,GHz LDMOS power amplifier used in a supply modulated envelope tracking transmitter with real-time predistortion. Causes of nonlinearities are identified, and various supply voltage drives are experimented. Measured results show that the power efficiency can be improved while maintaining high linearity. Copyright © 2008 John Wiley & Sons, Ltd. [source] Using MOS current dividers for linearization of programmable gain amplifiersINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 4 2008M. Teresa Sanz Abstract Two highly linear, digitally programmable gain amplifiers are presented and compared in terms of linearity, frequency, area and power consumption. High linearity and wide gain tuning range with moderate area consumption are the main benefits of both configurations. Furthermore, constant bandwidth is achieved by means of switched compensation capacitor arrays. Three-bit prototypes were integrated in a 0.35,µm,3.3,V CMOS process with 2.5,V supply voltage. Experimental distortion levels are better than ,68,dB for 1,MHz and 1,Vp,p output signals in both configurations; hence, the suitability of the linearization technique based on MOS current dividers is shown. Copyright © 2007 John Wiley & Sons, Ltd. [source] Analysis and design of a fully integrated CMOS low-noise amplifier for concurrent dual-band receiversINTERNATIONAL JOURNAL OF RF AND MICROWAVE COMPUTER-AIDED ENGINEERING, Issue 5 2006Y. P. Zhang Abstract This article thoroughly analyzes a concurrent dual-band low-noise amplifier (LNA) and carefully examines the effects of both active and passive elements on the performance of the dual-band LNA. As an example of the analysis, a fully integrated dual-band LNA is designed in a standard 0.18-,m 6M1P CMOS technology from the system viewpoint for the first time to provide a higher gain at the high band in order to compensate the high-band signal's extra loss over the air transmission. The LNA drains 6.21 mA of current from a 1.5-V supply voltage and achieves voltage gains of 14 and 22 dB, input S11 of 15 and 18 dB, and noise figures of 2.45 and 2.51 dB at 2.4 and 5.2 GHz, respectively. © 2006 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2006. [source] Low power dual transformer injection locked frequency divider using 0.5 ,m GaAs E/D-mode PHEMTs processMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 10 2010Po-Yu Ke Abstract This letter proposes a new divide-by-2 injection locked frequency divider (ILFD) fabricated by 0.5 ,m GaAs ED-Mode PHEMTs process and describes the operation principle of the dual-transformer ILFD. The first transformer is applied to replace two inductors of the cross-couple LC-tank oscillator circuit. The injection signal of the ILFD transmits into a transistor through a second transformer, which consisted of a bandpass filter achieving a high injection signal power and wide locking range. The measurement results show that the divider's free-running frequency were from 6.47 to 9.54 GHz (32.2%) with 3 V supply voltage. With an incident power of 0 dBm, the locking range is 3.07 GHz from the incident frequency 16.41 to 19.45 GHz (15.6%). The measured phase noise of free running VCO is ,92.2 dBc/Hz at 1 MHz offset frequency at 9.45 GHz and this value of the locked ILFD is ,128.4 dBc/Hz, which is 36.2 dB lower than the free running VCO. The core power consumption was 42 mW. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2302,2306, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25442 [source] A low voltage balanced Clapp VCO in 0.13 micromolar CMOS technologyMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 7 2010Sheng-Lyang Jang Abstract A balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.13 ,m CMOS 1P8M process. The designed VCO circuit topology is an all nMOS LC-tank Clapp VCO using a series-tuned resonator. At the supply voltage of 0.5 V, the output phase noise of the VCO is ,108.69 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 17.72 GHz, and the figure of merit is ,186.84 dBc/Hz. The core power consumption is 4.2 mW. Tuning range is about 3.32 GHz, from 17.55 to 20.87 GHz, while the control voltage was tuned from 0 to 1.3 V. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1623,1625, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25275 [source] A 90 nm CMOS dual-band divide-by-2 and -4 injection-locked frequency dividerMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 6 2010Sheng-Lyang Jang Abstract A fourth-order resonator has been implemented to design a 65 GHz injection-locked frequency divider (ILFD) implemented in a 90 nm CMOS process. The ILFD is realized with a cross-coupled nMOS LC-tank oscillator with an inductor switch for frequency band selection. The LC tank can be a second-or fourth-order resonator depending upon the on/off state of a switch across a series-tuned inductor. Measurement results show that at the supply voltage of 0.5 V, the free-running frequency is from 8.68 (16.147) to 9.928 (17.89) GHz for the low- (high-) frequency band. The divide-by-2 operational locking range is from 14.9 (30.64) to 22.2 (37.74) GHz for the low-(high)-frequency band. The divide-by-4 operational locking range is from 34.4 (64.6) to 40.35 (67) GHz for the low-(high)-frequency band. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1421,1425, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25217 [source] Low-voltage/low-power 7-GHZ transformer-coupled current-reused CMOS QVCO with wide tuning rangeMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 4 2010Yan-Ru Tseng Abstract In this article, we report the design of a transformer-coupled current-reused quadrature voltage-controlled oscillator (QVCO) having low-voltage operation, low-power consumption, and a wide tuning range. An improved trifilar transformer that is fabricated by symmetrically interlacing two half circle secondary coils between the turns of the primary coil is proposed to provide a higher magnetic coupling factor. A QVCO integrated with such a trifilar transformer is implemented using 0.18-,m RF CMOS technology. When the QVCO is operated at a supply voltage of 1V at 7.263 GHz, the measured phase noise is ,111.4 dBc/Hz at a 1-MHz offset. Further, the QVCO core draws only 1.58 mW. The total tuning range is ,510 MHz over the whole tuning range (from 0 to 1.8 V). The calculated figure of merit is 186.6 dB and the power-frequency-tuning-normalized factor is ,9.4 dB. As compared to the reported data in a previous study, a 28.2% reduction in power consumption and a 54.5% increase in tuning range can be achieved. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:797,801, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25058 [source] A novel tunable dual-band low noise amplifier for 868/915 MHz and 2.4 GHz Zigbee application by CMOS technologyMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 3 2010Kai Xuan Abstract A dual-band (868/915 MHz and 2.4 GHz) low noise amplifier for Zigbee applications is designed using 0.35-,m CMOS technology. At 868/915 MHz and 2.4 GHz, the gains achieved are both 16 dB and the resulting noise figures are about 2.5 dB and 2.7 dB, respectively. The input and the output reflections are below ,10 dB in both bands. The amplifier works at 2.5 V supply voltage with 12 mA current dissipation. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 507,510, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24964 [source] Low power wide-locking range CMOS quadrature injection-locked frequency dividerMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 10 2009Sheng-Lyang Jang Abstract This letter presents a new low power and wide-locking range divide-by-2 injection-locked frequency divider (ILFD). The ILFD consists of a new 5.35 GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.18 ,m CMOS technology and the core power consumption is 5.72 mW at the supply voltage of 0.8 V. The free-running frequency of the QILFD is tunable from 5.24 to 5.55 GHz. At the input power of 0 dBm, the divide-by-2 locking range is from 8.2 to 13.3 GHz as the tuning voltage is biased at 0.8 V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the divide-by-2 mode. The phase deviation of quadrature output is about 1.28°. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2420,2423, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24640 [source] A digitally controlled band-switching VCO using switching inductors and capacitors in 0.18 ,m CMOSMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 7 2008Tienyu Chang Abstract In this article, a digitally controlled band-switching voltage controlled oscillator (VCO) is designed and fabricated using TSMC 0.18 ,m CMOS technology. Design considerations regarding the power requirement and the phase noise of the VCO are discussed. Eight bands are set by three bits, with one bit controlling switching inductors, and two bits controlling switching capacitors. The VCO covers 2.9,3.45 GHz and 3.6,4.3 GHz using varactors for continuous frequency tuning. Phase noise of the VCO stays constant around ,110 dBc/Hz at 1 MHz offset for all bands. The fabricated VCO consumes 11 mA of current with 1.8 V supply voltage and has a small size of 730 ,m × 660 ,m. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 1970,1973, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23496 [source] Divide-by-3 LC injection-locked frequency divider with inductor over MOS topologyMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 4 2008Sheng-Lyang Jang Abstract This letter proposes a divide-by-3 frequency divider employing inductor-over MOS topology to reduce the chip area and chip cost; the divider was fabricated using the 0.35-,m 2P4M CMOS technology. The divider consists of an nMOS cross-coupled LC oscillator and two injection MOSFETs in series with the cross-coupled NMOSFETs, and the LC resonator is composed of two inductors and varactors. At the supply voltage of 1.6 V, the divider free-running frequency is tunable from 2.17 to 2.43 GHz, and at the incident power of 0 dBm the locking range is about 1.03 GHz (14.9%), from the incident frequency 6.41 to 7.44 GHz. The core power consumption is 15.1 mW. The die area is 0.753 × 0.786 mm2. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 988,992, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23279 [source] A varactorless CMOS direct-injection locked frequency dividerMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 3 2008S.-L. Jang Abstract This paper presents a new integrated direct-injection locked frequency (ILFD) with the capability of quadrature generation. The circuit consists of a quadrature VCO, based on the cross-coupling of two differential LC-tank VCOs and with the coupling transistors placed in parallel with the switch transistors, and two direct injection MOSFETs. No varactors are used, and feedback is applied for frequency tuning. The circuit is implemented using a standard 0.35 ,m CMOS process. Measurement results show that at the supply voltage of 3.3 V, the core power consumption is 27 mW. The free-running ILFD is tunable from 1.5 to 1.98 GHz and the locking range is 2.92,4.26 GHz at 0 dBm. The measured phase noise of free-running ILFD is ,118.3 dBc/Hz while the locked quadrature output phase noise is ,126.7 dBc/Hz at 1 MHz offset frequency from the oscillation frequency of 1.98 GHz, which is 8.4 dB lower than the free running ILFD. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 608,611, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23165 [source] A dual band CMOS complementary Colpitts voltage controlled oscillatorMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 11 2007Sheng-Lyang Jang Abstract A new fully integrated, dual-band CMOS voltage controlled oscillator (VCO) is presented. The VCO is composed of two complementary Colpitts VCOs and is implemented in 0.18-,m CMOS technology with 2-V supply voltage. The circuit allows the VCO to operate at two resonant frequencies with a common LC tank. This VCO is configured with 2.4- and 5.2-GHz frequency bands with differential outputs. The dual-band VCO operates at 2.39,2.68 GHz and 4.84,5.58 GHz. The phase noises of the VCO operating at 2.4 and 5.13 GHz are ,121.11 and ,111.76 dBc/Hz at 1-MHz offset, respectively, while the VCO draws 7.45/5.92 mA and 14.9/11.84 mW consumption at high/low frequency band from a 2-V supply. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2634,2637, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22814 [source] A complementary Hartley injection-locked frequency dividerMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 11 2007Sheng-Lyang Jang Abstract This work proposes a new injection-locked frequency divider (ILFD) based on the differential complementary Hartley VCO topology. At the supply voltage of 1.8 V, the tuning range of the free running ILFD is from 7.54 to 7.94 GHz, about 400 MHz, and the locking range of the ILFD is from 14.94 to 16.05 GHz, about 1.11 GHz, at the injection signal power of 0 dBm. The ILFD dissipates 13.54 mW at the supply voltage of 1.8 V and was fabricated in the 1P6M 0.18 ,m CMOS process. The phase noise of the locked ILFD tracks with the low-phase-noise injection source. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2817,2820, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22834 [source] A low voltage highly linear 24-GHz down conversion mixer in 0.18-,m CMOSMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 10 2007Masum Hossain Abstract A K-band low voltage, highly linear folded Gilbert cell mixer in 0.18-,m CMOS is presented. An optimization technique been introduced which is particularly applicable to Gilbert cell type mixers. This technique has been experimentally verified with a down conversion mixer fabricated in a 0.18-,m CMOS process. Utilizing PMOS devices in the transconductance stage and using a 2-V supply voltage, the mixer can down convert from 24 GHz to 10 MHz with an input referred third order intercept of +20 dBm and a conversion gain of 2 dB. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2547,2552, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22759 [source] Injection-locked GaInp/GaAs HBT frequency divider with stacked transformersMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 10 2007Hung-Ju Wei Abstract The first integrated GaInP/GaAs heterojunction bipolar transistor (HBT) injection-locked frequency divider (ILFD) with the stacked transformers is demonstrated around 10 GHz. The stacked transformers formed by only two metal layers provide the inductive coupling in the cross feedback and separate biasing for base and collector to allow for the larger output swing in the LC tank and obtaining wide locking range. Under the supply voltage of 5 V and core power consumption of 20.5 mW, the locking range is 7.8% of the center operating frequency. The chip size of the entire ILFD including probing pads is 1.0 × 1.0 mm2. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2602,2605, 2007; Published online in Wiley InterScience (www.interscience.wiley.com) DOI 10.1002/mop.22737 [source] High-gain high-isolation CMFB stacked-LO subharmonic gilbert mixer using SiGe BiCMOS technologyMICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 5 2007T. H. Wu Abstract A 5.2-GHz SiGe BiCMOS stacked-LO-stage CMFB (common mode feedback) subharmonic mixer is demonstrated in this article. The stacked-LO-stage and the active loads are used to improve the 2LO-RF isolation and the conversion gain, respectively. The SiGe mixer includes five levels of transistors stacked together at the supply voltage of 3.3 V because of the low knee-voltage characteristic of the SiGe HBTs (heterojunction bipolar transistors). The mixer demonstrated achieves 23 dB conversion gain and ,78 dB 2LO-RF isolation. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1214,1216, 2007; Published online in Wiley InterScience (www.interscience.wiley.com) DOI 10.1002/mop.22398 [source] A Power Efficient Electronic Implant for a Visual Cortical NeuroprosthesisARTIFICIAL ORGANS, Issue 3 2005Jonathan Coulombe Abstract:, An integrated microstimulator designed for a cortical visual prosthesis is presented, along with a pixel reordering algorithm, together minimizing the peak total current and voltage required for stimulation of large numbers of electrodes at a high rate. In order to maximize the available voltage for stimulation at a given supply voltage for generating biphasic pulses, the device uses monopolar stimulation, where the return electrode voltage is dynamically varied. Thus, the voltage available for stimulation is maximized, as opposed to the conventional fixed return voltage monopolar approach, and impedance is significantly lower than can be achieved using bipolar stimulation with microelectrodes. This enables the use of a low voltage power supply, minimizing power consumption of the device. An important constraint resulting from this stimulation strategy, however, is that current generation needs to be simultaneous and in-phase for all active parallel channels, imposing heavy stress on the wireless power recovery and regulation circuitry in large electrode count systems such as a visual prosthesis. An ordering algorithm to be implemented in the external controller of the prosthesis is then proposed. Based on the data for each frame of the video signal to be transmitted to the implant, the algorithm minimizes the total generated current standard deviation between time multiplexed stimulations by determining the most appropriate combination of parallel stimulation channels to be activated simultaneously. A stimulator prototype has been implemented in CMOS technology and successfully tested. Execution of the external controller reordering algorithm on an application specific hardware architecture has been verified using a System-On-Chip development platform. A near 75% decrease in the total stimulation current standard deviation was observed with a one-pass algorithm, whereas a recursive variation of the algorithm resulted in a greater than 95% decrease of the same variable. [source] Printed Sub-2 V Gel-Electrolyte-Gated Polymer Transistors and CircuitsADVANCED FUNCTIONAL MATERIALS, Issue 4 2010Yu Xia Abstract The fabrication and characterization of printed ion-gel-gated poly(3-hexylthiophene) (P3HT) transistors and integrated circuits is reported, with emphasis on demonstrating both function and performance at supply voltages below 2,V. The key to achieving fast sub-2,V operation is an unusual gel electrolyte based on an ionic liquid and a gelating block copolymer. This gel electrolyte serves as the gate dielectric and has both a short polarization response time (<1,ms) and a large specific capacitance (>10,µF cm,2), which leads simultaneously to high output conductance (>2,mS mm,1), low threshold voltage (<1,V) and high inverter switching frequencies (1,10,kHz). Aerosol-jet-printed inverters, ring oscillators, NAND gates, and flip-flop circuits are demonstrated. The five-stage ring oscillator operates at frequencies up to 150,Hz, corresponding to a propagation delay of 0.7 ms per stage. These printed gel electrolyte gated circuits compare favorably with other reported printed circuits that often require much larger operating voltages. Materials factors influencing the performance of the devices are discussed. [source] Universal resistorless current-mode filters employing CCCIIsINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 5-6 2008Erkan Yuce Abstract In this paper, four different-type second-order current-mode filters, employing second-generation current-controlled conveyors (CCCIIs) and two capacitors, are proposed. The first two of the presented filters can simultaneously realize high-output impedance low-pass, band-pass and high-pass responses. Also, the two filters can provide notch and all-pass filter responses with interconnection of the relevant output currents. The first developed one needs no critical active and passive element matching conditions and/or cancellation constraints. The second and third introduced ones employ only grounded capacitors. The fourth proposed filter derived from the third one uses only plus-type single output CCCIIs (CCCII+s). The fifth filter can be constructed using commercially available active devices such as AD844s along with additional resistors instead of CCCII+s of the fourth proposed filter to perform experimental test easily. All of the proposed filters have low active and passive element sensitivities. Time and frequency domain analyses are performed for the first, second and third realized filters using SPICE simulation program. Also, experimental test is achieved for the fifth filter. In this study, stability problems attributed to non-ideal gains of the CCCIIs and signal limitations of the first, second and third introduced filters due to restricted power supply voltages are investigated. Copyright © 2007 John Wiley & Sons, Ltd. [source] Multiple operating points in a square-root domain first-order filterINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 1 2007Carlos A. De La Cruz-Blas Abstract In this paper novel corrective circuits to avoid multiple operating points in a square-root domain first-order filter are proposed. By employing a DC test it is demonstrated that the filter possesses three operating points (two stable and one unstable) and the corrective circuits enforce the proper operating mode. The corrective circuits and filter are able to operate with very low supply voltages (as low as VGS+2VDSsat). Moreover, a detailed analysis concerning the impact that produces the corrective circuits on the filter performance is discussed. Both measurement and simulation results are provided to validate the circuits and analysis employed. Copyright © 2006 John Wiley & Sons, Ltd. [source] Amplitude estimation for near-sinusoidal oscillators by using a modified Barkhausen criterionINTERNATIONAL JOURNAL OF RF AND MICROWAVE COMPUTER-AIDED ENGINEERING, Issue 6 2005H. Jardón-Aguilar Abstract By using an approach based on the Taylor/Volterra series, nonlinear amplifier characteristics can be introduced into the Barkhausen criterion in order to estimate the amplitude for near-sinusoidal oscillators. The characteristic equation is similar to the 1st -order determining equation obtained by Chua. This new method includes all desirable features of Chua's equation and lets us generalize the linear approach directly to a nonlinear one without losing the mathematical simplicity of the Barkhausen criterion. It also allows us to determine the oscillation amplitude with a desired accuracy. Moreover, this method investigates the influence of the feedback factor and the voltage supply on the oscillation amplitude. Employing only the 3rd -order nonlinearity of the amplifying element, the amplitude of the oscillation predicted by the modified Barkhausen criterion was compared to the one estimated using the transient analysis of SPICE, the harmonic balance analysis of Serenade, and by measurements. The amplitudes obtained by these four approaches for several feedback factors and supply voltages are in good agreement. © 2005 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2005. [source] | |||||||||||||