Home  About us  Contact
 

Gain Amplifier (gain + amplifier)

Distribution by Scientific Domains
Engineering100%

Kinds of Gain Amplifier

  • programmable gain amplifier
    		•

    Selected Abstracts

    A switched-capacitor programmable gain amplifier using dynamic element matching

    IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING, Issue 6 2007
    Jun Wang Non-member
    Abstract This paper discusses the effect of capacitor mismatch errors on gain accuracy of switched-capacitor programmable gain amplifier (SC PGA). To improve gain deviations caused by mismatch errors, the dynamic element matching (DEM) algorithm is applied to the SC PGA circuits. It uses digital gain-control signal to dynamically vary the matched capacitor combinations so that the effective capacitances of the sampling and feedback capacitor arrays are averaged, and thus the gain deviations due to capacitor mismatch errors are eliminated to a significant extent. The distortion caused by mismatch errors shift to certain frequency bands, and could be reduced or removed by subsequent processing such as lowpass filtering. A 4-bit SC PGA using DEM was designed in 0.25 µm CMOS process with 2.5 V voltage supply, including offset cancellation and clock bootstrapped circuits operating at a sampling frequency of 10 MHz. Test results have indicated that gain deviations due to mismatch errors are substantially reduced. Copyright © 2007 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. [source]

    A variable gain amplifier using a very-high speed OTA

    MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, Issue 5 2010
    You Zheng
    Abstract A variable gain amplifier is demonstrated using only one fully-differential operational transconductance amplifier (OTA) as the core circuit element.Gain control is achieved by varying the transconductance of the OTA and by using an output buffer circuit to sum the output signals of the OTA in the correct phase relationship. The circuit was designed and fabricated using 0.18 ,m CMOS technology. Measured results show a gain control range of 15 dB between 1 GHz and 3 GHz and the input and output reflection coefficients are below ,10 dB and ,20 dB, respectively. The output power of the amplifier is +2.3 dBm at its 1-dB compression point. The chip has a maximum DC power consumption 12.6 mW and it measures 0.25 mm2 including bonding pads. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1112,1116, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25114 [source]

    Using MOS current dividers for linearization of programmable gain amplifiers

    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 4 2008
    M. Teresa Sanz
    Abstract Two highly linear, digitally programmable gain amplifiers are presented and compared in terms of linearity, frequency, area and power consumption. High linearity and wide gain tuning range with moderate area consumption are the main benefits of both configurations. Furthermore, constant bandwidth is achieved by means of switched compensation capacitor arrays. Three-bit prototypes were integrated in a 0.35,µm,3.3,V CMOS process with 2.5,V supply voltage. Experimental distortion levels are better than ,68,dB for 1,MHz and 1,Vp,p output signals in both configurations; hence, the suitability of the linearization technique based on MOS current dividers is shown. Copyright © 2007 John Wiley & Sons, Ltd. [source]