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Digital Signal Processor (digital + signal_processor)
Selected AbstractsModular hardware design for distant-internet embedded systems engineering laboratoryCOMPUTER APPLICATIONS IN ENGINEERING EDUCATION, Issue 4 2009Xicai Yue Abstract A novel hardware system providing remote accessible embedded system experiments of microcontroller, digital signal processor (DSP), and field-programmable gate array (FPGA) via Internet is presented. Three newly developed hardware modules for integrating experimental boards, experimental instrumentation, and a PC workstation in the distant embedded laboratory are fully described. © 2009 Wiley Periodicals, Inc. Comput Appl Eng Educ 17: 389,397, 2009; Published online in Wiley InterScience (www.interscience.wiley.com); DOI 10.1002/cae.20259 [source] Design and implementation of a new neural network-based high speed distance relayEUROPEAN TRANSACTIONS ON ELECTRICAL POWER, Issue 4 2008M. Sanaye-Pasand Abstract This paper presents a new neural network-based transmission line distance protection module. The proposed module uses samples of voltage and current signals to learn the hidden relationship existing in the input patterns. Using a power system model, simulation studies are preformed and influence of changing system parameters such as fault resistance and power flow direction is studied. The proposed neural network has also been implemented on a digital signal processor (DSP) board and its behavior is investigated using suitable developed hardware. Details of the implementation and experimental studies are given in the paper. Performance studies results show that the proposed algorithm is able to distinguish various transmission line faults rapidly and correctly. It shows that the proposed network is fast, reliable, and accurate. Copyright © 2007 John Wiley & Sons, Ltd. [source] Design of a near-optimal adaptive filter in digital signal processor for active noise controlINTERNATIONAL JOURNAL OF ADAPTIVE CONTROL AND SIGNAL PROCESSING, Issue 1 2008S. M. Yang Abstract Adaptive filter has been applied in adaptive feedback and feedforward control systems, where the filter dimension is often determined by trial-and-error. The controller design based on a near-optimal adaptive filter in digital signal processor (DSP) is developed in this paper for real-time applications. The design integrates the adaptive filter and the experimental design such that their advantages in stability and robustness can be combined. The near-optimal set of controller parameters, including the sampling rate, the dimension of system identification model, the dimension (order) of adaptive controller in the form of an FIR filter, and the convergence rate of adaptation is shown to achieve the best possible system performance. In addition, the sensitivity of each design parameter can be determined by analysis of means and analysis of variance. Effectiveness of the adaptive controller on a DSP is validated by an active noise control experiment. Copyright © 2007 John Wiley & Sons, Ltd. [source] Robot vision with cellular neural networks: a practical implementation of new algorithmsINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 4 2007Giovanni Egidio Pazienza Abstract Cellular neural networks (CNNs) are well suited for image processing due to the possibility of a parallel computation. In this paper, we present two algorithms for tracking and obstacle avoidance using CNNs. Furthermore, we show the implementation of an autonomous robot guided using only real-time visual feedback; the image processing is performed entirely by a CNN system embedded in a digital signal processor (DSP). We successfully tested the two algorithms on this robot. Copyright © 2006 John Wiley & Sons, Ltd. [source] Design, implementation and verification through a real-time test-bed of a multi-rate CDMA adaptive interference mitigation receiver for satellite communicationINTERNATIONAL JOURNAL OF SATELLITE COMMUNICATIONS AND NETWORKING, Issue 1 2003Luca Fanucci Abstract This paper presents the design, the implementation, and the main performance results of a multi-rate code division multiple access (CDMA) interference mitigation receiver for satellite communication. Such activity was performed within a research project supported by the European Space Agency (ESA), whose aim was to demonstrate the suitability of the linear adaptive interference mitigation detector (IMD) named extended complex-valued blind anchored interference-mitigating detector (EC-BAID) for single-user detection of a CDMA signal in third-generation (3G) satellite networks. Such a detector, which exhibits a remarkable robustness to multiple access interference, operates in a blind mode, i.e. it only requires knowledge of the timing of the wanted user's signature code, and is therefore very well suited for integration into handheld user terminals. Experimental results in terms of bit error rate with respect to the theoretical behaviour were derived through a specifically developed test bed. Signal plus multiple access interference generation is performed via a computer-controlled arbitrary waveform generator, followed by frequency up-conversion to the standard intermediate frequency of 70 MHz. Additive white Gaussian noise is then injected with the aid of a precision noise generator. The core of the test bed is a flexible digital receiver prototype featuring the EC-BAID detector plus all functions ancillary to IMD (multi-rate front-end, automatic gain control, code acquisition and tracking, carrier synchronization, etc.). Those functions were implemented through careful mixing of different technologies: field programmable gate arrays (FPGAs) for computing-intensive signal processing functions, digital signal processor (DSP) for housekeeping and monitoring, and application specific integrated circuit (ASIC) for adaptive IMD. The adopted design flow also allows an easy re-use of the prototype architecture to come to an overall integration of the receiver into a single ASIC with modest complexity and power consumption increase with respect to a conventional detector. Copyright © 2003 John Wiley & Sons, Ltd. [source] |