Delay Performance (delay + performance)

Distribution by Scientific Domains


Selected Abstracts


End-to-end network delay model for heavy-tailed environments

EUROPEAN TRANSACTIONS ON TELECOMMUNICATIONS, Issue 5 2003
David Muñoz-Rodríguez
Adequate quality of Internet Protocol (IP) services demand low transmission delays. However, packets traveling in a network are subject to a variety of delays that degrade severely the quality of service in real-time applications. This paper presents a general packet jitter-assessment methodology for a multi-node path in the presence of heavy-tailed traffic. Using the extreme-value theory, it is shown that delay performance is governed by a proposed networking-processing factor |T|lambda dependent on the traffic characteristics, the processing time along the path segments and the number of nodes in a route. |T|lambda allows the establishment of design constraints and the definition of a feasibility space for a routing algorithm in order to guarantee a quality of service (QoS). Copyright © 2003 AEI. [source]


Delay analysis of a probabilistic priority discipline

EUROPEAN TRANSACTIONS ON TELECOMMUNICATIONS, Issue 6 2002
Yuming Jiang
In computer networks, the Strict Priority (SP) discipline is perhaps the most common and simplest method to schedule packets from different classes of applications, each with diverse performance requirements. With this discipline, however, packets at higher priority levels can starve packets at lower priority levels. To resolve this starvation problem, we propose to assign a parameter to each priority queue in the SP discipline. The assigned parameter determines the probability or extent by which its corresponding queue is served when the queue is polled by the server. We thus form a new packet service discipline, referred to as the Probabilistic Priority (PP) discipline. By properly adjusting the assigned parameters, not only is the performance of higher priority classes satisfied, but also the performance of lower priority classes can be improved. This paper analyzes the delay performance of the PP discipline. A decomposition approach is proposed for calculating the average waiting times and their bounds are studied. Two approximation approaches are proposed to estimate the waiting times. Simulation results that validate the numerical analysis are presented and examined. A numerical example which demonstrates the use of the PP discipline to achieve service differentiation is presented. This example also shows how the assigned parameters can be determined from the results of analysis mentioned above. [source]


Modelling of source-coupled logic gates

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Issue 4 2002
M. Alioto
Abstract In this paper, the modelling of CMOS SCL gates is addressed. The topology both with and without output buffer is treated, and the noise margin as well as propagation delay performance are analytically derived, using standard BSIM3v3 model parameters. The propagation delay model of a single SCL gate is based on proper linearization of the circuit and the assumption of a single-pole behaviour. To generalize the results obtained to cascaded gates, the effect of the input rise time and the loading effect of an SCL gate are discussed. The expressions obtained are simple enough to be used for pencil-and-paper evaluations and are helpful from the early design phases, as they relate SCL gates performance to design and process parameters, allowing the designer to gain an intuitive understanding of performance dependence on design parameters and technology. The model has been validated by comparison with extensive simulations using a 0.35-µm CMOS process. The model agrees well with the simulated results, since in realistic cases the difference is less than 20% both for noise margin and delay. Therefore, the model proposed can be profitably used for pencil-and-paper evaluations and for computer-based timing analysis of complex SCL circuits. Copyright © 2002 John Wiley & Sons, Ltd. [source]


Resource allocation for statistical quality of service provision in buffered crossbar switches,

INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS, Issue 6 2008
Qiang Duan
Abstract The buffered crossbar switch is a promising switching architecture that plays a crucial role for providing quality of service (QoS) in computer networks. Sufficient amount of resources,bandwidth and buffer space,must be allocated in buffered crossbar switches for QoS provision. Resource allocation based on deterministic QoS objectives might be too conservative in practical network operations. To improve resource utilization in buffered crossbar switches, we study the problem of resource allocation for statistical QoS provision in this paper. First, we develop a model and techniques for analyzing the probabilistic delay performance of buffered crossbar switches, which is described by the delay upper bound with a prescribed violation probability. Then, we determine the required amounts of bandwidth and buffer space to achieve the probabilistic delay objectives for different traffic classes in buffered crossbar switches. In our analysis, we apply the effective arrival envelope to specify traffic load in a statistical manner and characterize switch service capacity by using the service curve technique. Instead of just focusing on one specific type of scheduler, the model and techniques developed in this paper are very flexible and can be used for analyzing buffered crossbar switches with a wide variety of scheduling algorithms. Copyright © 2007 John Wiley & Sons, Ltd. [source]


Fast ping-pong arbitration for input,output queued packet switches

INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS, Issue 7 2001
H. Jonathan Chao
Abstract Input,output queued switches have been widely considered as the most feasible solution for large capacity packet switches and IP routers. In this paper, we propose a ping-pong arbitration scheme (PPA) for output contention resolution in input,output queued switches. The challenge is to develop a high speed and cost-effective arbitration scheme in order to maximize the switch throughput and delay performance for supporting multimedia services with various quality-of-service (QoS) requirements. The basic idea is to divide the inputs into groups and apply arbitration recursively. Our recursive arbiter is hierarchically structured, consisting of multiple small-size arbiters at each layer. The arbitration time of an n -input switch is proportional to log4,n/2, when we group every two inputs or every two input groups at each layer. We present a 256×256 terabit crossbar multicast packet switch using the PPA. The design shows that our scheme can reduce the arbitration time of the 256×256 switch to 11 gates delay, demonstrating the arbitration is no longer the bottleneck limiting the switch capacity. The priority handling in arbitration is also addressed. Copyright © 2001 John Wiley & Sons, Ltd. [source]


Study of delay patterns of weighted voice traffic of end-to-end users on the VoIP network

INTERNATIONAL JOURNAL OF NETWORK MANAGEMENT, Issue 5 2002
Jeong-Soo Han
In this paper we study delay patterns of weighted voice traffic of end-to-end users on the Voice over Internet Protocol (VoIP) network. We compare the delay performance of voice traffic which varies with queue management techniques such as First-In First-Out (FIFO) and Weighted Fair Queuing (WFQ) and voice codec algorithms such as G.723 and G.729 and select an optimal algorithm. Copyright © 2002 John Wiley & Sons, Ltd. [source]