Home About us Contact | |||
Channel Layers (channel + layer)
Selected AbstractsA Characterization Study of a Nanowire-Network Transistor with Various Channel LayersADVANCED MATERIALS, Issue 41 2009Jae Eun Jang The performance of a ZnO network transistor is studied by means of the change in threshold slope with varying number of nanowire channel layers. The threshold slope broadens as the number of layers in the channel increases and, in the case of a two-layer channel, a double turn-on effect can be observed. The gate-field simulation shows gate-field distortion by the surface of the nanowire. [source] Printable Ferroelectric PVDF/PMMA Blend Films with Ultralow Roughness for Low Voltage Non-Volatile Polymer MemoryADVANCED FUNCTIONAL MATERIALS, Issue 17 2009Seok Ju Kang Abstract Here, a facile route to fabricate thin ferroelectric poly(vinylidene fluoride) (PVDF)/poly(methylmethacrylate) (PMMA) blend films with very low surface roughness based on spin-coating and subsequent melt-quenching is described. Amorphous PMMA in a blend film effectively retards the rapid crystallization of PVDF upon quenching, giving rise to a thin and flat ferroelectric film with nanometer scale , -type PVDF crystals. The still, flat interfaces of the blend film with metal electrode and/or an organic semi-conducting channel layer enable fabrication of a highly reliable ferroelectric capacitor and transistor memory unit operating at voltages as low as 15,V. For instance, with a TIPS-pentacene single crystal as an active semi-conducting layer, a flexible ferroelectric field effect transistor shows a clockwise I,V hysteresis with a drain current bistability of 103 and data retention time of more than 15,h at ±15,V gate voltage. Furthermore, the robust interfacial homogeneity of the ferroelectric film is highly beneficial for transfer printing in which arrays of metal/ferroelectric/metal micro-capacitors are developed over a large area with well defined edge sharpness. [source] A Characterization Study of a Nanowire-Network Transistor with Various Channel LayersADVANCED MATERIALS, Issue 41 2009Jae Eun Jang The performance of a ZnO network transistor is studied by means of the change in threshold slope with varying number of nanowire channel layers. The threshold slope broadens as the number of layers in the channel increases and, in the case of a two-layer channel, a double turn-on effect can be observed. The gate-field simulation shows gate-field distortion by the surface of the nanowire. [source] Subgap states, doping and defect formation energies in amorphous oxide semiconductor a-InGaZnO4 studied by density functional theoryPHYSICA STATUS SOLIDI (A) APPLICATIONS AND MATERIALS SCIENCE, Issue 7 2010Toshio Kamiya Abstract Amorphous In-Ga-Zn-O (a-IGZO) is expected for channel layers in thin-film transistors (TFTs). It is known that a-IGZO is sensitive to an O/H-containing atmosphere; therefore, it is important to clarify the roles of oxygen and hydrogen in a-IGZO. This paper provides atomic and electronic structures, formation energies of defects and bond energies in a-IGZO calculated by first-principles density functional theory (DFT). It was confirmed that oxygen deficiencies having small formation energies (2,3.6,eV) form either deep fully-occupied localized states near the valence band maximum or donor states, which depend on their local structures. All the hydrogen doping form OH bond and work as a donor. The stable OH bonds have small formation energy of ,0.45,eV and consist of three metal cations coordinated to the O ion. The bond energy of GaO is calculated to be ,2.0,eV, which is the largest among the chemical bonds in a-IGZO (1.7,eV for InO and 1.5,eV for ZnO). This result supports the idea that the incorporation of Ga stabilizes a-IGZO TFTs. [source] |